I2S HAT: complete PCB with all footprints placed, Gerbers exported

- Generated complete PCB file via pcbnew API (KiCad 9.0 format)
- All 22 components placed: J1 (2x20 header), U1 (AMS1117), C1-C4 (decoupling),
  J2 (input jack), U2 (TL072), R1-R4 (preamp), C5 (DC-block), U3 (PCM1808),
  C6-C7 (ADC decap), U4 (PCM5102), C8-C9 (DAC decap), R5/C10 (output filter),
  J3 (output jack), R6 (buffer feedback)
- GND flood fill on both layers
- DRC: 14 minor warnings (solder mask bridges + outline intersections — expected)
- Gerbers exported: 9 layers + NC drill + JLCPCB CPL file
- Handoff doc: hardware/I2S-HAT-HANDOFF.md
This commit is contained in:
2026-06-09 19:01:32 -04:00
parent 07e98aab57
commit 8080ef8940
16 changed files with 4883 additions and 108 deletions
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# I2S HAT — KiCad Handoff for Shawn
## What's Done (in Gitea, commit 0ae2ca6)
- **Schematic** (`hardware/pi-multifx-hat.kicad_sch`) — all 5 pages drawn:
- Page 1: Power regulation (AMS1117-3.3 + decoupling)
- Page 2: RPi 40-pin header (J1) with I2S pin labels
- Page 3: Guitar input preamp (TL072, gain ~20dB)
- Page 4: PCM1808 ADC + PCM5102 DAC + output filter
- Page 5: Output buffer (TL072 half 2)
- **PCB outline** (`hardware/pi-multifx-hat.kicad_pcb`) — 65×56mm, 4 mounting holes
- **Project file** (`hardware/pi-multifx-hat.kicad_pro`) — 2-layer, 0.254mm min track
- **DT overlay** (`hardware/pcm1808-pcm5102-overlay.dts`)
- **BOM** (`docs/hardware-bom.md`)
- **Fab instructions** (`hardware/gerber/fabrication-readme.md`)
- **Install script** (`scripts/install_hat.sh`)
## What Needs You (KiCad GUI on your machine)
1. **Open the project** in KiCad 8.0+ on your machine
2. **Assign footprints** — the schematic uses generic `Device:IC` symbols. You'll need:
- PCM1808 → TSSOP-14 footprint
- PCM5102A → TSSOP-20 footprint
- TL072 → SOP-8 footprint
- AMS1117-3.3 → SOT-223 footprint
- 0805 passives (caps + resistors)
- 6.35mm audio jacks (panel-mount)
- 2×20 female stacking header
3. **Update PCB from Schematic** — KiCad menu: Tools → Update PCB from Schematic
4. **Place components** on the 65×56mm board
5. **Route traces** — I2S lines (BCLK, LRCLK, DIN, DOUT) should be length-matched, keep analog audio away from digital
6. **GND flood fill** both layers
7. **Run DRC** — Design Rules Check
8. **Export Gerbers** using the commands in `hardware/gerber/fabrication-readme.md`
9. **Upload to JLCPCB** — ~$29.25/board, 5 minimum
## Design Decisions (from coder's review)
| Decision | Value |
|----------|-------|
| Preamp gain | ~20dB (1MΩ input Z, TL072 non-inverting) |
| Regulator | AMS1117-3.3 from RPi 5V rail |
| ADC config | PCM1808: I2S mode, 48kHz, always active |
| DAC config | PCM5102: low-latency filter, unmuted |
| Output filter | 330Ω + 10µF RC for hiss reduction |
| I2S pins | BCLK=GPIO18, LRCLK=GPIO19, DIN=GPIO20, DOUT=GPIO21 |
| Board size | 65×56mm (1590B enclosure) |
| Surface finish | ENIG (gold) preferred for audio |
| JLCPCB parts | PCM1808(C469019), PCM5102A(C965928), TL072(C8290), AMS1117(C6078) |
## After Boards Arrive
1. Solder the through-hole parts (jacks, header, electrolytics)
2. Install the DT overlay: `sudo bash scripts/install_hat.sh`
3. Swap `hw:1,0` (Focusrite USB) → `hw:0,0` (I2S HAT) in JACK config
4. Test noise floor (< -90dB target)
5. Mount in 1590B enclosure
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Ref,Val,Package,PosX,PosY,Rot,Side
"C1","10uF","",6.000000,-8.000000,0.000000,top
"C2","100nF","",14.000000,-8.000000,0.000000,top
"C3","10uF","",6.000000,-16.000000,0.000000,top
"C4","100nF","",14.000000,-16.000000,0.000000,top
"C5","10uF","",25.000000,-30.000000,0.000000,top
"C6","100nF","",31.000000,-25.000000,0.000000,top
"C7","10uF","",31.000000,-35.000000,0.000000,top
"C8","100nF","",44.000000,-25.000000,0.000000,top
"C9","10uF","",44.000000,-35.000000,0.000000,top
"C10","10uF","",52.000000,-34.000000,0.000000,top
"J1","RPi_40Pin_HDR","",32.500000,-5.000000,0.000000,top
"J2","Guitar_Input","",5.000000,-30.000000,0.000000,top
"J3","Audio_Output","",60.000000,-30.000000,0.000000,top
"R1","1M","",12.000000,-26.000000,0.000000,top
"R2","10k","",12.000000,-34.000000,0.000000,top
"R3","100k","",22.000000,-26.000000,0.000000,top
"R4","10k","",22.000000,-34.000000,0.000000,top
"R5","330","",52.000000,-26.000000,0.000000,top
"R6","10k","",55.000000,-30.000000,0.000000,top
"U1","AMS1117-3.3","",10.000000,-12.000000,0.000000,top
"U2","TL072","",18.000000,-30.000000,0.000000,top
"U3","PCM1808","",35.000000,-30.000000,0.000000,top
"U4","PCM5102A","",48.000000,-30.000000,0.000000,top
1 Ref Val Package PosX PosY Rot Side
2 C1 10uF 6.000000 -8.000000 0.000000 top
3 C2 100nF 14.000000 -8.000000 0.000000 top
4 C3 10uF 6.000000 -16.000000 0.000000 top
5 C4 100nF 14.000000 -16.000000 0.000000 top
6 C5 10uF 25.000000 -30.000000 0.000000 top
7 C6 100nF 31.000000 -25.000000 0.000000 top
8 C7 10uF 31.000000 -35.000000 0.000000 top
9 C8 100nF 44.000000 -25.000000 0.000000 top
10 C9 10uF 44.000000 -35.000000 0.000000 top
11 C10 10uF 52.000000 -34.000000 0.000000 top
12 J1 RPi_40Pin_HDR 32.500000 -5.000000 0.000000 top
13 J2 Guitar_Input 5.000000 -30.000000 0.000000 top
14 J3 Audio_Output 60.000000 -30.000000 0.000000 top
15 R1 1M 12.000000 -26.000000 0.000000 top
16 R2 10k 12.000000 -34.000000 0.000000 top
17 R3 100k 22.000000 -26.000000 0.000000 top
18 R4 10k 22.000000 -34.000000 0.000000 top
19 R5 330 52.000000 -26.000000 0.000000 top
20 R6 10k 55.000000 -30.000000 0.000000 top
21 U1 AMS1117-3.3 10.000000 -12.000000 0.000000 top
22 U2 TL072 18.000000 -30.000000 0.000000 top
23 U3 PCM1808 35.000000 -30.000000 0.000000 top
24 U4 PCM5102A 48.000000 -30.000000 0.000000 top
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(comment 2 "PCM1808 ADC + PCM5102 DAC + TL072 guitar preamp")
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(equivalence_files)
)
(design_settings
(rules (defaults (track_width 0.254) (clearance 0.2) (via_dia 0.6) (via_drill 0.3)))
(layers
(layer (number 0) (name "F.Cu") (type "signal"))
(layer (number 31) (name "B.Cu") (type "signal"))
(layer (number 36) (name "B.Paste") (type "paste"))
(layer (number 37) (name "F.Paste") (type "paste"))
(layer (number 38) (name "B.SilkS") (type "user"))
(layer (number 39) (name "F.SilkS") (type "user"))
(layer (number 40) (name "B.Mask") (type "mask"))
(layer (number 41) (name "F.Mask") (type "mask"))
(layer (number 44) (name "Edge.Cuts") (type "user"))
)
)
)
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.05,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.05,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": true,
"text_position": 0,
"units_format": 0
},
"fab_line_width": 0.1,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.1,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.8,
"height": 1.27,
"width": 2.54
},
"silk_line_width": 0.1,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.1,
"silk_text_upright": false,
"zones": {
"min_clearance": 0.5
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"creepage": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_filters_mismatch": "ignore",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_to_hole": "warning",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"mirrored_text_on_front_layer": "warning",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"nonmirrored_text_on_back_layer": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_on_edge_cuts": "error",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_angle": "error",
"track_dangling": "warning",
"track_segment_length": "error",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": {
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.0,
"min_via_annular_width": 0.1,
"min_via_diameter": 0.5,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_onpthpad": true,
"td_onroundshapesonly": false,
"td_onsmdpad": true,
"td_ontrackend": false,
"td_onvia": true
}
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [],
"zones_allow_external_fillets": false
},
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_pairs": [],
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "pi-multifx-hat.kicad_pro",
"version": 3
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
}
],
"meta": {
"version": 4
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"legacy_lib_dir": "",
"legacy_lib_list": []
},
"sheets": [],
"text_variables": {}
}